Re: [PATCH v4 3/7] iommu: Support allocation of global PASIDs outside SVA

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On 4/18/23 12:46 AM, Jacob Pan wrote:
On Wed, 12 Apr 2023 09:37:48 +0800, Baolu Lu<baolu.lu@xxxxxxxxxxxxxxx>
wrote:

On 4/11/23 4:02 PM, Tian, Kevin wrote:
From: Jacob Pan<jacob.jun.pan@xxxxxxxxxxxxxxx>
Sent: Saturday, April 8, 2023 2:06 AM
@@ -28,8 +26,8 @@ static int iommu_sva_alloc_pasid(struct mm_struct
*mm, ioasid_t min, ioasid_t ma
   		goto out;
   	}

-	ret = ida_alloc_range(&iommu_global_pasid_ida, min, max,
GFP_KERNEL);
-	if (ret < min)
+	ret = iommu_alloc_global_pasid(min, max);
I wonder whether this can take a device pointer so
dev->iommu->max_pasids is enforced inside the alloc function.
Agreed. Instead of using the open code, it looks better to have a helper
like dev_iommu_max_pasids().
yes, probably export dev_iommu_get_max_pasids(dev)?

But if I understood Kevin correctly, he's also suggesting that the
interface should be changed to iommu_alloc_global_pasid(dev), my concern is
that how do we use this function to reserve RID_PASID which is not specific
to a device?

Probably we can introduce a counterpart dev->iommu->min_pasids, so that
there's no need to reserve the RID_PASID. At present, we can set it to 1
in the core as ARM/AMD/Intel all treat PASID 0 as a special pasid.

In the future, if VT-d supports using arbitrary number as RID_PASID for
any specific device, we can call iommu_alloc_global_pasid() for that
device.

The device drivers don't know and don't need to know the range of viable
PASIDs, so the @min, @max parameters seem to be unreasonable.

Best regards,
baolu



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