This callback allows the DMA Engine API user to set a per-channel
configuration structure before calling dmaengine_prep_slave_sg.
This is a prerequisite for being able to do CDMA SG transfers, because
one of the transfer ends is meant to be a preconfigured contiguous
block of memory.
A later implementation of CDMA SG transfers will access this configuration
structure, and is therefore dependent on this change.
Signed-off-by: Adrian Larumbe <adrian.martinezlarumbe@xxxxxxxxxx>
---
drivers/dma/xilinx/xilinx_dma.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index 3f859de593dc..49c7093e2487 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -392,6 +392,7 @@ struct xilinx_dma_tx_descriptor {
* @irq: Channel IRQ
* @id: Channel ID
* @direction: Transfer direction
+ * @cfg: DMA slave channel configuration
* @num_frms: Number of frames
* @has_sg: Support scatter transfers
* @cyclic: Check for cyclic transfers.
@@ -429,6 +430,7 @@ struct xilinx_dma_chan {
int irq;
int id;
enum dma_transfer_direction direction;
+ struct dma_slave_config cfg;
int num_frms;
bool has_sg;
bool cyclic;
@@ -2565,6 +2567,21 @@ static void xilinx_dma_chan_remove(struct xilinx_dma_chan *chan)
list_del(&chan->common.device_node);
}
+/**
+ * xilinx_dma_slave_config - Set the channel config
+ * @dchan: DMA channel
+ * @cfg: DMA slave channel configuration
+ */
+static int xilinx_dma_slave_config(struct dma_chan *dchan,
+ struct dma_slave_config *cfg)
+{
+ struct xilinx_dma_chan *chan = to_xilinx_chan(dchan);
+
+ chan->cfg = *cfg;
+
+ return 0;
+}
+
static int axidma_clk_init(struct platform_device *pdev, struct clk **axi_clk,
struct clk **tx_clk, struct clk **rx_clk,
struct clk **sg_clk, struct clk **tmp_clk)
@@ -3095,6 +3112,7 @@ static int xilinx_dma_probe(struct platform_device *pdev)
xdev->common.device_terminate_all = xilinx_dma_terminate_all;
xdev->common.device_tx_status = xilinx_dma_tx_status;
xdev->common.device_issue_pending = xilinx_dma_issue_pending;
+ xdev->common.device_config = xilinx_dma_slave_config;
if (xdev->dma_config->dmatype == XDMA_TYPE_AXIDMA) {
dma_cap_set(DMA_CYCLIC, xdev->common.cap_mask);
xdev->common.device_prep_slave_sg = xilinx_dma_prep_slave_sg;
--
2.17.1
