Hi,
Changes since v1:
- Added Kishon's tested-by to the first two patch
- Moved the variable definitions to the start of their respective functions
- Remove braces where they are not needed
- correct indentation of cases
- additional patch to clean up the ret = 0 initializations in tisci channel configuration
functions, no functional changes.
Newer members of the KS3 family (after AM654) have support for burst_size
configuration for each DMA channel.
The HW default value is 64 bytes but on higher throughput channels it can be
increased to 256 bytes (UCHANs) or 128 byes (HCHANs).
Aligning the buffers and length of the transfer to the burst size also increases
the throughput.
Numbers gathered on j721e (UCHAN pair):
echo 8000000 > /sys/module/dmatest/parameters/test_buf_size
echo 2000 > /sys/module/dmatest/parameters/timeout
echo 50 > /sys/module/dmatest/parameters/iterations
echo 1 > /sys/module/dmatest/parameters/max_channels
Prior to this patch: ~1.3 GB/s
After this patch: ~1.8 GB/s
with 1 byte alignment: ~1.7 GB/s
Regards,
Peter
---
Peter Ujfalusi (3):
dmaengine: Extend the dmaengine_alignment for 128 and 256 bytes
dmaengine: ti: k3-udma: Add support for burst_size configuration for
mem2mem
dmaengine: ti: k3-udma: Do not initialize ret in tisci channel config
functions
drivers/dma/ti/k3-udma.c | 130 ++++++++++++++++++++++++++++++++++----
include/linux/dmaengine.h | 2 +
2 files changed, 120 insertions(+), 12 deletions(-)
--
2.30.0
