Linus Torvalds <torvalds@xxxxxxxxxxxxxxxxxxxx> writes: > On Sat, Aug 29, 2020 at 1:40 PM Guenter Roeck <linux@xxxxxxxxxxxx> wrote: >> >> Except for >> >> CHECK: spaces preferred around that '+' (ctx:VxV) >> #29: FILE: drivers/dma/fsldma.h:223: >> + u32 val_lo = in_be32((u32 __iomem *)addr+1); > > Added spaces. > >> I don't see anything wrong with it either, so >> >> Reviewed-by: Guenter Roeck <linux@xxxxxxxxxxxx> >> >> Since I didn't see the real problem with the original code, >> I'd take that with a grain of salt, though. > > Well, honestly, the old code was so confused that just making it build > is clearly already an improvement even if everything else were to be > wrong. The old code is not that old, only ~18 months: a1ff82a9c165 ("dmaengine: fsldma: Adding macro FSL_DMA_IN/OUT implement for ARM platform") (Jan 2019) So I think it's possible it's never been tested on 32-bit ppc at all. I did have a 32-bit FSL machine but it lost its network card in a power outage and now it won't boot (and I can't get to it physically). > So I committed my "fix". If it turns out there's more wrong in there > and somebody tests it, we can fix it again. But now it hopefully > compiles, at least. > > My bet is that if that driver ever worked on ppc32, it will continue > to work whatever we do to that function. > > I _think_ the old code happened to - completely by mistake - get the > value right for the case of "little endian access, with dma_addr_t > being 32-bit". Because then it would still read the upper bits wrong, > but the cast to dma_addr_t would then throw those bits away. And the > lower bits would be right. > > But for big-endian accesses or for ARCH_DMA_ADDR_T_64BIT it really > looks like it always returned a completely incorrect value. > > And again - the driver may have worked even with that completely > incorrect value, since the use of it seems to be very incidental. > > In either case ("it didn't work before" or "it worked because the > value doesn't really matter"), I don't think I could possibly have > made things worse. Agreed. Hopefully someone from NXP can test it. cheers