Well, this doesn't appear to completely solve the problem either -
one out of four of my platforms still spat out the error (because
the SDMA initialisation can run on a different CPU to that which
receives the interrupt.)
I've thought about using a completion, but that doesn't work either,
because in the case of a single CPU, the interrupts will be masked,
so we can't wait for completion. I think we need to eliminate that
spinlock around this code.
On Sat, Jun 22, 2019 at 07:55:53PM +0100, Russell King wrote:
> When imx-sdma was converted to use readl_relaxed_poll_timeout_atomic(),
> the termination condition was inverted. Fix this.
>
> Fixes: 1d069bfa3c78 ("dmaengine: imx-sdma: ack channel 0 IRQ in the interrupt handler")
> Signed-off-by: Russell King <rmk+kernel@xxxxxxxxxxxxxxx>
> ---
> drivers/dma/imx-sdma.c | 12 +++++++++---
> 1 file changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
> index 5f3c1378b90e..c45cbdb09714 100644
> --- a/drivers/dma/imx-sdma.c
> +++ b/drivers/dma/imx-sdma.c
> @@ -655,15 +655,21 @@ static void sdma_enable_channel(struct sdma_engine *sdma, int channel)
> static int sdma_run_channel0(struct sdma_engine *sdma)
> {
> int ret;
> - u32 reg;
> + u32 reg, mask;
> +
> + // Disable channel 0 interrupt
> + mask = readl_relaxed(sdma->regs + SDMA_H_INTRMSK);
> + writel_relaxed(mask & ~1, sdma->regs + SDMA_H_INTRMSK);
>
> sdma_enable_channel(sdma, 0);
>
> - ret = readl_relaxed_poll_timeout_atomic(sdma->regs + SDMA_H_STATSTOP,
> - reg, !(reg & 1), 1, 500);
> + ret = readl_relaxed_poll_timeout_atomic(sdma->regs + SDMA_H_INTR,
> + reg, reg & 1, 1, 500);
> if (ret)
> dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
>
> + writel_relaxed(mask, sdma->regs + SDMA_H_INTRMSK);
> +
> /* Set bits of CONFIG register with dynamic context switching */
> reg = readl(sdma->regs + SDMA_H_CONFIG);
> if ((reg & SDMA_H_CONFIG_CSM) == 0) {
> --
> 2.7.4
>
>
--
RMK's Patch system: https://www.armlinux.org.uk/developer/patches/
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