Hi, * John Ogness <john.ogness@xxxxxxxxxxxxx> [160211 04:04]: > > At these speeds, nearly every DMA interrupt is accompanied by a spurious > UART interrupt. So, sadly, the interrupts are doubled. > > It is on my TODO list to verify if the spurious UART interrupts exactly > match the recently added [0] spurious interrupt detection in omap-intc. If you're seeing spurious interrupts you may want try adding a flush of posted write at the end of the 8250_omap interrupt handler. Basically read back some register from the 8250. This has fixed so far pretty much all the spurious IRQ issues for omaps using the drivers/irqchip/irq-omap-intc.c, meaning omap3 and am335x and ti81xx variants too most likely. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html