Re: [PATCH 1/2] dmaengine: zxdma: Fix data width bug

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On Tue, Jul 21, 2015 at 11:01:05AM +0800, Jun Nie wrote:
> Align src and dst width to fix data alignment issue. Hardware
> burst length limitation can be addressed well too.
What is the data alignment issue you have? Why not document that in code and
changelog?


> 
> Signed-off-by: Jun Nie <jun.nie@xxxxxxxxxx>
> ---
>  drivers/dma/zx296702_dma.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/dma/zx296702_dma.c b/drivers/dma/zx296702_dma.c
> index ec470bc..4757f74 100644
> --- a/drivers/dma/zx296702_dma.c
> +++ b/drivers/dma/zx296702_dma.c
> @@ -143,6 +143,7 @@ static void zx_dma_terminate_chan(struct zx_dma_phy *phy, struct zx_dma_dev *d)
>  
>  	val = readl_relaxed(phy->base + REG_ZX_CTRL);
>  	val &= ~ZX_CH_ENABLE;
> +	val |= ZX_FORCE_CLOSE;
how is this related to data width?

-- 
~Vinod
>  	writel_relaxed(val, phy->base + REG_ZX_CTRL);
>  
>  	val = 0x1 << phy->idx;
> @@ -475,13 +476,12 @@ static int zx_pre_config(struct zx_dma_chan *c, enum dma_transfer_direction dir)
>  		 * We need make sure dst len not exceed MAX LEN.
>  		 */
>  		dst_width = zx_dma_burst_width(cfg->dst_addr_width);
> -		maxburst = cfg->dst_maxburst * cfg->dst_addr_width
> -				/ DMA_SLAVE_BUSWIDTH_8_BYTES;
> +		maxburst = cfg->dst_maxburst;
>  		maxburst = maxburst < ZX_MAX_BURST_LEN ?
>  				maxburst : ZX_MAX_BURST_LEN;
>  		c->ccfg = ZX_DST_FIFO_MODE | ZX_CH_ENABLE
>  			| ZX_SRC_BURST_LEN(maxburst - 1)
> -			| ZX_SRC_BURST_WIDTH(ZX_DMA_WIDTH_64BIT)
> +			| ZX_SRC_BURST_WIDTH(dst_width)
>  			| ZX_DST_BURST_WIDTH(dst_width);
>  		break;
>  	case DMA_DEV_TO_MEM:
> @@ -493,7 +493,7 @@ static int zx_pre_config(struct zx_dma_chan *c, enum dma_transfer_direction dir)
>  		c->ccfg = ZX_SRC_FIFO_MODE | ZX_CH_ENABLE
>  			| ZX_SRC_BURST_LEN(maxburst - 1)
>  			| ZX_SRC_BURST_WIDTH(src_width)
> -			| ZX_DST_BURST_WIDTH(ZX_DMA_WIDTH_64BIT);
> +			| ZX_DST_BURST_WIDTH(src_width);
>  		break;
>  	default:
>  		return -EINVAL;
> -- 
> 1.9.1
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