On Wed, Apr 15, 2015 at 08:53:07PM +0200, Noralf Trønnes wrote: > A 16-bit register can't hold a value of 65536. > Either the max value is 65535 or the register is 17-bits wide. It is common for hardware registers to have the value "0" mean 65536 in case of a 16-bit register. The hardware would then FIRST decrement the register and THEN check for zero. This results in the behaviour that "1" requires one cycle to complete, "10" requires ten cycles, and "0" means the same as the total number of bitpatterns possible in the register. (256 for an 8-bit register, 65536 for a 16-bit register). Another way to implement such a register in hardware would "check for zero" first, and not do antyhing if the register equals zero. This results in differnet behaviour for the "0" value. That said: IMHO, the overhead of setting up 2 transfers for each 64k block as opposed to only one results in such a small performance penalty that I'd prefer to play it safe unless you're very sure you can adequately test it. (Another option would be to set the maximum transfer size to 0xf000: 60kbytes. Less than 10% extra transfers in the long run than when aiming for the edge...) Roger. -- ** R.E.Wolff@xxxxxxxxxxxx ** http://www.BitWizard.nl/ ** +31-15-2600998 ** ** Delftechpark 26 2628 XH Delft, The Netherlands. KVK: 27239233 ** *-- BitWizard writes Linux device drivers for any device you may have! --* The plan was simple, like my brother-in-law Phil. But unlike Phil, this plan just might work. -- To unsubscribe from this list: send the line "unsubscribe dmaengine" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
