On Tue, Mar 17, 2015 at 04:57:46PM +0200, Andy Shevchenko wrote:
> On Tue, 2015-03-17 at 15:13 +0100, Maxime Ripard wrote:
> > Hi Andy,
> >
> > On Tue, Mar 10, 2015 at 12:25:07PM +0200, Andy Shevchenko wrote:
> > > In some cases we might have DMA powered off and therefore get 0xffffffff from
> > > the register. This patch introduces a counter to prevent a hang.
> > >
> > > Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
> > > ---
> > > drivers/dma/dw/core.c | 7 +++++--
> > > 1 file changed, 5 insertions(+), 2 deletions(-)
> > >
> > > diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
> > > index a8ad052..3f514d6 100644
> > > --- a/drivers/dma/dw/core.c
> > > +++ b/drivers/dma/dw/core.c
> > > @@ -191,8 +191,10 @@ static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)
> > >
> > > static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc)
> > > {
> > > + unsigned int count = 20;
> > > +
> > > channel_clear_bit(dw, CH_EN, dwc->mask);
> > > - while (dma_readl(dw, CH_EN) & dwc->mask)
> > > + while (dma_readl(dw, CH_EN) & dwc->mask && count--)
> >
> > It looks like a good case for the new readl_poll_timeout_* functions.
>
> I like the idea, but it is not a good case unfortunately. There are not
> endianess-aware. And I don't have time to implement the generic support
> of that.
Ok, nevermind then :)
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
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