[PATCH v1 1/1] dmaengine: dw: make busyloops limited by counter

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In some cases we might have DMA powered off and therefore get 0xffffffff from
the register. This patch introduces a counter to prevent a hang.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@xxxxxxxxxxxxxxx>
---
 drivers/dma/dw/core.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index a8ad052..3f514d6 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -191,8 +191,10 @@ static inline void dwc_dump_chan_regs(struct dw_dma_chan *dwc)
 
 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc)
 {
+	unsigned int count = 20;
+
 	channel_clear_bit(dw, CH_EN, dwc->mask);
-	while (dma_readl(dw, CH_EN) & dwc->mask)
+	while (dma_readl(dw, CH_EN) & dwc->mask && count--)
 		cpu_relax();
 }
 
@@ -1109,6 +1111,7 @@ static void dwc_issue_pending(struct dma_chan *chan)
 
 static void dw_dma_off(struct dw_dma *dw)
 {
+	unsigned int count = 20;
 	int i;
 
 	dma_writel(dw, CFG, 0);
@@ -1118,7 +1121,7 @@ static void dw_dma_off(struct dw_dma *dw)
 	channel_clear_bit(dw, MASK.DST_TRAN, dw->all_chan_mask);
 	channel_clear_bit(dw, MASK.ERROR, dw->all_chan_mask);
 
-	while (dma_readl(dw, CFG) & DW_CFG_DMA_EN)
+	while (dma_readl(dw, CFG) & DW_CFG_DMA_EN && count--)
 		cpu_relax();
 
 	for (i = 0; i < dw->dma.chancnt; i++)
-- 
2.1.4

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