On Mon, Aug 24, 2015 at 11:29:37AM +0530, Vaibhav Hiremath wrote: > With addition of PXA910 family of devices, the TWSI module supports > new feature which allows us to adjust SCLK. i2c-pxa driver takes input > configuration in nsec and converts it to respective bit-fields, > > - i2c-sclk-low-time-ns : SCLK low time (tlow) > This property is used along with mode selection. > - i2c-sclk-high-time-ns : SCLK high time (thigh) > - i2c-start-hold-time-ns : Used in case of high speed mode for start bit > hold/setup wait counter. > - i2c-stop-hold-time-ns : Used in case of high speed mode for stop bit > hold/setup wait counter. > - i2c-sda-hold-time-ns : Used to calculate hold/setup wait counter for > standard and fast mode. > > Signed-off-by: Vaibhav Hiremath <vaibhav.hiremath@xxxxxxxxxx> Ooookay, after checking some datasheets, I finally stumbled over the fact that this driver is not using "clock-frequency" to determine the bus speed. However, this is the standard way of defining that in DT, so this driver should adhere to that, too, and not invent something new. Previously, I was under the impression that the above parameters were needed for fine-tuning and couldn't fully grasp why. But this is for defining the bus speed which is a no-go. It looks to me that older PXA only have a bit to select between 100 and 400kHz while this newer one can have arbitrary frequencies. Correct? So, what the driver should do: - Keep support for the old "mrvl,i2c-fast-mode" binding which should be marked as deprecated - get the value of the standard property "clock-frequency" - for old PXAs, complain if not 100 or 400kHz, otherwise set the bit accordingly - for new PXAs, calculate the ilcr and iwcr values from "clock-frequency" Makes sense? Regards, Wolfram
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