On Fri, Oct 23, 2015 at 1:35 PM, Brian Norris <computersforpeace@xxxxxxxxx> wrote: > On Thu, Oct 22, 2015 at 09:51:30PM -0700, Florian Fainelli wrote: >> 2015-10-22 20:58 GMT-07:00 Tejun Heo <tj@xxxxxxxxxx>: >> I think we have a bit too many compatible strings defined, I need to >> lookup tomorrow when I am back in the office which BCM7xxx started >> featuring a SATA3 AHCI compliant core, it might be 7420, but I am not >> sure > > I thought it was BCM7425, but you probably have the resources to check > better than I do. It was originally introduced on 7422 A0 (40nm) and the test chip that preceded it. The production rev of 7422 uses the 7425 die, so "BCM7425" is a good enough answer for our purposes. BCM7420, BCM7400, and other 65nm SoCs had a ServerWorks SATA2 core on an internal PCI-X bus. These ran a modified version of sata_svw.c, and could support QDMA. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
