On 10/15, Jon Mason wrote: > The PLL loop filter/gain can be located in a separate register on some > SoCs. Split these off into a separate variable, so that an offset can > be added if necessary. Also, make the necessary modifications to the > Cygnus and NSP drivers for this change. > > Signed-off-by: Jon Mason <jonmason@xxxxxxxxxxxx> > --- Applied to clk-iproc -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
