This patch configure correctly the MMC-0 clock for STiH418 platform.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@xxxxxxxxxx>
---
arch/arm/boot/dts/stih418-b2199.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/stih418-b2199.dts b/arch/arm/boot/dts/stih418-b2199.dts
index 82eee39..7a03ca6 100644
--- a/arch/arm/boot/dts/stih418-b2199.dts
+++ b/arch/arm/boot/dts/stih418-b2199.dts
@@ -85,6 +85,10 @@
sd-uhs-sdr50;
sd-uhs-sdr104;
sd-uhs-ddr50;
+
+ assigned-clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
+ assigned-clock-parents = <&clk_s_c0_pll1 0>;
+ assigned-clock-rates = <200000000>;
};
miphy28lp_phy: miphy28lp@9b22000 {
--
1.9.1
--
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