On Fri, Jul 31, 2015 at 08:30:03AM -0700, santosh shilimkar wrote: > Olof, > > As discussed patch 1/2 is already made it via clock tree. Please > pick the subject fix for your upcoming fixes pull request. > > On 5/29/2015 9:04 AM, Murali Karicheri wrote: > >All of the keystone devices have a separate register to hold post > >divider value for main pll clock. Currently the fixed-postdiv > >value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to > >use a value of 2 for this. Now that we have fixed this in the pll > >clock driver change the dt bindings for the same. > > > >Signed-off-by: Murali Karicheri <m-karicheri2@xxxxxx> > >--- > Acked-by: Santosh Shilimkar <ssantosh@xxxxxxxxxx> > > Thanks, applied. -Olof -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
