* Roger Quadros <rogerq@xxxxxx> [150710 05:26]: > Since the Interrupt Events are used only by the NAND driver, > there is no point in managing the Interrupt registers > in the GPMC driver and complicating it with irqchip modeling. I don't think it's a good idea to allow external drivers to tinker directly with GPMC registers. How about just set up GPMC as an irqchip for the edge detection interrupts? I think we already have devices with multiple NAND chips. And there's nothing stopping other drivers from using the edge detection interrupts. Regards, Tony -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@xxxxxxxxxxxxxxx More majordomo info at http://vger.kernel.org/majordomo-info.html
