Re: [PATCH v4 3/6] dt-bindings: PCI: qcom: Add IPQ5018 SoC

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On 3/14/25 13:20, Krzysztof Kozlowski wrote:
On 14/03/2025 09:42, George Moussalem wrote:
+        reg-names:
+          items:
+            - const: parf # Qualcomm specific registers
+            - const: dbi # DesignWare PCIe registers
+            - const: elbi # External local bus interface registers
+            - const: atu # ATU address space
+            - const: config # PCIe configuration space

Keep the same order as other IPQ, so dbi+elbi+atu+parf+config. Same for
everything else, so standard rule applies: devices are supposed to use
ordering from existing variants.

There is some huge mess with IPQ PCI bindings, including things on the
list. Apparently it became my job to oversee Qualcomm PCI work... well,
I do not have time for that, so rather I expect contributors to
cooperate in this matter.

Don't throw your patches over the wall.

If you need to rework the patch, take the ownership and rework it.



Thanks Krzysztof. I did reorder them deliberately based on unit
addresses as discussed also in other threads about IPQ9574 and IPQ5332
as I thought it would be neater that way. I'll change it back, reuse

Which discusses were that? What were the reasons to start with parf?


I based the reordering on this patch so assumed that was the direction (at that time):
https://patchwork.kernel.org/project/linux-pci/patch/20250128062708.573662-5-quic_varada@xxxxxxxxxxx/

This was then reverted in subsequent version so will reorder as suggested.


other sections in the dt as much as possible, and follow your guidance
instead.

Best regards,
Krzysztof

Best regards,
George




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