So this is a bit more complicated than i first guessed...
> phy-mode = "rmii";
> clock_in_out = "input";
Probably will not get passed the DT maintainers. The clocking needs
investigating.
> phy-handle = <&rmii0_phy>;
>
> mdio0: mdio {
> compatible = "snps,dwmac-mdio";
> #address-cells = <0x1>;
> #size-cells = <0x0>;
>
> rmii0_phy: ethernet-phy@2 {
> compatible = "ethernet-phy-id0044.1400", "ethernet-phy-ieee802.3-c22";
> reg = <2>;
> clocks = <&cru CLK_MACPHY>;
> resets = <&cru SRST_MACPHY>;
Using the ID suggests there might be a chicken/egg with the reset and
clock. The ID registers cannot be read from the PHY?
> phy-is-integrated;
This suggests the possibility exists to route the RMII interface to the
outside world:
phy-is-integrated:
$ref: /schemas/types.yaml#/definitions/flag
description:
If set, indicates that the PHY is integrated into the same
physical package as the Ethernet MAC. If needed, muxers
should be configured to ensure the integrated PHY is
used. The absence of this property indicates the muxers
should be configured so that the external PHY is used.
Given these issues, i suggest you keep with the DT as you have it
now. Adding the PHY node will require access to hardware and some
investigations.
Andrew
