On 04/03/2025 10:31, Jacky Bai wrote:
> Add the minimal dtsi support for i.MX943. i.MX943 is the
> first SoC of i.MX94 Family, create a common dtsi for the
> whole i.MX94 family, and the specific dtsi part for i.MX943.
>
> The clock, power domain and perf index need to be used by
> the device nodes for resource reference, add them along
> with the dtsi support.
>
> Signed-off-by: Jacky Bai <ping.bai@xxxxxxx>
> ---
> - v2 changes:
> - remove the unnecessary macro define in clock header as suggested by Krzysztof
> - split the dtsi into imx94.dtsi and imx943.dtsi
> - use low case in the pinfunc header as Frank suggested
> - reorder the device nodes and properties
> - resolve Krzysztof's other comments
Which ones? Be specific.
Based on last issue, I don't think you implemented comments.
> +
> + a55_irqsteer: interrupt-controller@446a0000 {
> + compatible = "fsl,imx-irqsteer";
> + reg = <0x446a0000 0x1000>;
> + #interrupt-cells = <1>;
> + interrupt-controller;
> + interrupts = <GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&scmi_clk IMX94_CLK_BUSAON>;
> + clock-names = "ipg";
> + fsl,channel = <0>;
> + fsl,num-irqs = <960>;
> + };
> + };
> +
> + aips4: bus@49000000 {
> + compatible = "fsl,aips-bus", "simple-bus";
> + reg = <0x0 0x49000000 0x0 0x800000>;
> + ranges = <0x49000000 0x0 0x49000000 0x800000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + wdog3: watchdog@49220000 {
> + compatible = "fsl,imx93-wdt";
imx93 or imx95, like in other places? And the commit msg says imx943.
I already asked for that.
> + reg = <0x49220000 0x10000>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&scmi_clk IMX94_CLK_BUSWAKEUP>;
> + timeout-sec = <40>;
> + fsl,ext-reset-output;
> + status = "disabled";
> + };
> + };
Best regards,
Krzysztof
