Am Donnerstag, 27. Februar 2025, 23:21:22 CET schrieb Frank Li:
> On Thu, Feb 27, 2025 at 10:34:20PM +0100, Marek Vasut wrote:
> > On 2/27/25 10:27 PM, Frank Li wrote:
> >
> > [...]
> >
> > > > > > + gpu: gpu@4d900000 {
> > > > > > + compatible = "fsl,imx95-mali", "arm,mali-valhall-csf";
> > > > > > + reg = <0 0x4d900000 0 0x480000>;
> > > > > > + clocks = <&scmi_clk IMX95_CLK_GPU>;
> > > > > > + clock-names = "core";
> > > > > > + interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>,
> > > > > > + <GIC_SPI 289 IRQ_TYPE_LEVEL_HIGH>,
> > > > > > + <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
> > > > > > + interrupt-names = "gpu", "job", "mmu";
> > > > > > + mali-supply = <&gpu_fixed_reg>;
> > > > > > + operating-points-v2 = <&gpu_opp_table>;
> > > > > > + power-domains = <&scmi_devpd IMX95_PD_GPU>, <&scmi_perf IMX95_PERF_GPU>;
> > > > > > + power-domain-names = "mix", "perf";
> > > > > > + resets = <&gpu_blk_ctrl 0>;
> > > > > > + #cooling-cells = <2>;
> > > > > > + dynamic-power-coefficient = <1013>;
> > > > > > + status = "disabled";
> > > > >
> > > > > GPU is internal module, which have not much dependence with other module
> > > > > such as pinmux. why not default status is "disabled". Supposed gpu driver
> > > > > will turn off clock and power if not used.
> > > > My thinking was that there are MX95 SoC with GPU fused off, hence it is
> > > > better to keep the GPU disabled in DT by default. But I can also keep it
> > > > enabled and the few boards which do not have MX95 SoC with GPU can
> > > > explicitly disable it in board DT.
> > > >
> > > > What do you think ?
> > >
> > > GPU Fuse off should use access-control, see thread
> > > https://lore.kernel.org/imx/20250207120213.GD14860@localhost.localdomain/
> > Did that thread ever go anywhere ? It seems there is no real conclusion, is
> > there ? +Cc Alex .
>
> The direction is use access-control to indicate fuse disable. Only
> implement detail is under discussion.
Well, the discussion ended up to be more complicated for i.MX8M. For i.MX95
things are a bit easier, as fuses and clocks are controlled by System
Manager (SM), accessed using SCMI. [1] is more important for imx95.
Best regards
Alexander
[1] https://lore.kernel.org/all/20250204-imx-ocotp-v8-0-01be4a4bb045@xxxxxxx/
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