Add GPIO-based control for the PCIe Root Port PERST# signal. According to section 2.2 of the PCIe Electromechanical Specification (Revision 6.0), PERST# signal has to be deasserted after a delay of 100 ms (TPVPERL) to ensure proper reset sequencing during PCIe initialization. Signed-off-by: Sai Krishna Musham <sai.krishna.musham@xxxxxxx> --- This patch depends on the following patch series. https://lore.kernel.org/all/20250217072713.635643-3-thippeswamy.havalige@xxxxxxx/ --- drivers/pci/controller/pcie-xilinx-cpm.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/drivers/pci/controller/pcie-xilinx-cpm.c b/drivers/pci/controller/pcie-xilinx-cpm.c index 81e8bfae53d0..0e31b85658e6 100644 --- a/drivers/pci/controller/pcie-xilinx-cpm.c +++ b/drivers/pci/controller/pcie-xilinx-cpm.c @@ -6,6 +6,8 @@ */ #include <linux/bitfield.h> +#include <linux/delay.h> +#include <linux/gpio/consumer.h> #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/irqchip.h> @@ -568,8 +570,29 @@ static int xilinx_cpm_pcie_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct pci_host_bridge *bridge; struct resource_entry *bus; + struct gpio_desc *reset_gpio; int err; + /* Request the GPIO for PCIe reset signal */ + reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW); + if (IS_ERR(reset_gpio)) { + dev_err(dev, "Failed to request reset GPIO\n"); + return PTR_ERR(reset_gpio); + } + + /* Assert the reset signal */ + gpiod_set_value(reset_gpio, 0); + + /* + * As per section 2.2 of the PCI Express Card Electromechanical + * Specification (Revision 6.0), the deassertion of the PERST# signal + * should be delayed by 100 ms (TPVPERL). + */ + msleep(100); + + /* Deassert the reset signal */ + gpiod_set_value(reset_gpio, 1); + bridge = devm_pci_alloc_host_bridge(dev, sizeof(*port)); if (!bridge) return -ENODEV; -- 2.44.1
