Add documentation for the Rockchip RK3568 MIPI CSI-2 Host unit. Signed-off-by: Michael Riesch <michael.riesch@xxxxxxxxxxxxxx> --- .../bindings/media/rockchip,rk3568-mipi-csi.yaml | 123 +++++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 124 insertions(+) diff --git a/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi.yaml b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi.yaml new file mode 100644 index 000000000000..288941686e96 --- /dev/null +++ b/Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi.yaml @@ -0,0 +1,123 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/rockchip,rk3568-mipi-csi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip RK3568 MIPI CSI-2 Host + +maintainers: + - Michael Riesch <michael.riesch@xxxxxxxxxxxxxx> + +description: + The Rockchip RK3568 MIPI CSI-2 Host is a CSI-2 bridge with one input port + and one output port. It receives the data with the help of an external + MIPI PHY (C-PHY or D-PHY) and passes it to the Rockchip RK3568 Video Capture + (VICAP) block. + +properties: + compatible: + const: rockchip,rk3568-mipi-csi + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + phys: + maxItems: 1 + description: MIPI C-PHY or D-PHY. + + phy-names: + items: + - const: csiphy + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Input port node. Connect to e.g., a MIPI CSI-2 image sensor. + + properties: + endpoint: + $ref: video-interfaces.yaml# + unevaluatedProperties: false + + properties: + bus-type: + enum: [1, 4] + + required: + - bus-type + + port@1: + $ref: /schemas/graph.yaml#/$defs/port-base + unevaluatedProperties: false + description: + Output port node. Connect to RK3568 VICAP MIPI CSI-2 port. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - clocks + - phys + - phy-names + - ports + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/rk3568-cru.h> + #include <dt-bindings/power/rk3568-power.h> + + parent { + #address-cells = <2>; + #size-cells = <2>; + + csi: csi@fdfb0000 { + compatible = "rockchip,rk3568-mipi-csi"; + reg = <0x0 0xfdfb0000 0x0 0x10000>; + clocks = <&cru PCLK_CSI2HOST1>; + phys = <&csi_dphy>; + phy-names = "csiphy"; + power-domains = <&power RK3568_PD_VI>; + resets = <&cru SRST_P_CSI2HOST1>; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + csi_in: port@0 { + reg = <0>; + }; + + csi_out: port@1 { + reg = <1>; + + csi_output: endpoint { + remote-endpoint = <&vicap_mipi_input>; + }; + }; + }; + }; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index cd8fa1afe5eb..d83a7762dbe3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -20407,6 +20407,7 @@ M: Michael Riesch <michael.riesch@xxxxxxxxxxxxxx> L: linux-media@xxxxxxxxxxxxxxx S: Maintained F: Documentation/devicetree/bindings/media/rockchip,px30-vip.yaml +F: Documentation/devicetree/bindings/media/rockchip,rk3568-mipi-csi.yaml F: Documentation/devicetree/bindings/media/rockchip,rk3568-vicap.yaml ROCKCHIP CRYPTO DRIVERS -- 2.34.1
