On 2/10/2025 11:47 PM, Konrad Dybcio wrote:
> On 7.02.2025 8:39 AM, Manikanta Mylavarapu wrote:
>> From: Devi Priya <quic_devipriy@xxxxxxxxxxx>
>>
>> Add a node for the nss clock controller found on ipq9574 based devices.
>>
>> Signed-off-by: Devi Priya <quic_devipriy@xxxxxxxxxxx>
>> Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@xxxxxxxxxxx>
>> ---
>> Changes in V9:
>> - Rebased on linux-next tip.
>>
>> arch/arm64/boot/dts/qcom/ipq9574.dtsi | 19 +++++++++++++++++++
>> 1 file changed, 19 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> index 942290028972..29008b156a7e 100644
>> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
>> @@ -1193,6 +1193,25 @@ pcie0: pci@28000000 {
>> status = "disabled";
>> };
>>
>> + nsscc: clock-controller@39b00000 {
>> + compatible = "qcom,ipq9574-nsscc";
>> + reg = <0x39b00000 0x80000>;
>> + clocks = <&xo_board_clk>,
>> + <&cmn_pll NSS_1200MHZ_CLK>,
>> + <&cmn_pll PPE_353MHZ_CLK>,
>> + <&gcc GPLL0_OUT_AUX>,
>> + <0>,
>> + <0>,
>> + <0>,
>> + <0>,
>> + <0>,
>> + <0>,
>> + <&gcc GCC_NSSCC_CLK>;
>
> This last clock doesn't seem to be used in the driver - is that by design?
Hi Konrad,
Initially, was under the impression that the GCC_NSSCC_CLK will be enabled by the Ethernet driver.
However, that is incorrect and this clock is needed for accessing the NSSCC block itself. Hence restoring this.
I will enable this clock by using the PM APIs (pm_clk_add()) in next version.
Thanks & Regards,
Manikanta.
