Add a new compatible and related bindigns for the fpga-based AD485x AXI IP core, a variant of the generic AXI ADC IP. The AXI AD485x IP is a very similar HDL (fpga) variant of the generic AXI ADC IP, intended to control ad485x familiy. Although this is not preffered, the wildcard naming is used to match the published firmware under the same name. Signed-off-by: Antoniu Miclaus <antoniu.miclaus@xxxxxxxxxx> --- changes in v13: - adjust commit body and add comment on wildcard matching the published firmware. Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml index e1f450b80db2..f1b470f74069 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,axi-adc.yaml @@ -19,11 +19,13 @@ description: | memory via DMA. https://wiki.analog.com/resources/fpga/docs/axi_adc_ip + https://analogdevicesinc.github.io/hdl/library/axi_ad485x/index.html properties: compatible: enum: - adi,axi-adc-10.0.a + - adi,axi-ad485x reg: maxItems: 1 -- 2.48.1
