From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
Use the correct gpio0 address for Agilex5.
Fixes: 3f7c869e143a ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id")
Cc: stable@xxxxxxxxxxxxxxx
Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
---
changes in v2:
* Fix dtbs_check warning and update commit message for better
clarity.
link to v1:
- https://lore.kernel.org/all/20250212100131.2668403-1-niravkumar.l.rabara@xxxxxxxxx/
arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
index 51c6e19e40b8..7d9394a04302 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
@@ -222,9 +222,9 @@ i3c1: i3c@10da1000 {
status = "disabled";
};
- gpio0: gpio@ffc03200 {
+ gpio0: gpio@10c03200 {
compatible = "snps,dw-apb-gpio";
- reg = <0xffc03200 0x100>;
+ reg = <0x10c03200 0x100>;
#address-cells = <1>;
#size-cells = <0>;
resets = <&rst GPIO0_RESET>;
--
2.25.1
