On Mon, Feb 10, 2025 at 02:18:21PM +0100, patrice.chotard@xxxxxxxxxxx wrote: > From: Patrice Chotard <patrice.chotard@xxxxxxxxxxx> > > Add bindings for STM32 Octo Memory Manager (OMM) controller. > > OMM manages: > - the muxing between 2 OSPI busses and 2 output ports. > There are 4 possible muxing configurations: > - direct mode (no multiplexing): OSPI1 output is on port 1 and OSPI2 > output is on port 2 > - OSPI1 and OSPI2 are multiplexed over the same output port 1 > - swapped mode (no multiplexing), OSPI1 output is on port 2, > OSPI2 output is on port 1 > - OSPI1 and OSPI2 are multiplexed over the same output port 2 > - the split of the memory area shared between the 2 OSPI instances. > - chip select selection override. > - the time between 2 transactions in multiplexed mode. > > Signed-off-by: Patrice Chotard <patrice.chotard@xxxxxxxxxxx> > --- > .../memory-controllers/st,stm32mp25-omm.yaml | 201 ++++++++++++++++++ > 1 file changed, 201 insertions(+) > create mode 100644 Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml > > diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml > new file mode 100644 > index 000000000000..c897e6bf490d > --- /dev/null > +++ b/Documentation/devicetree/bindings/memory-controllers/st,stm32mp25-omm.yaml > @@ -0,0 +1,201 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/memory-controllers/st,stm32mp25-omm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STM32 Octo Memory Manager (OMM) > + > +maintainers: > + - Patrice Chotard <patrice.chotard@xxxxxxxxxxx> > + > +description: | > + The STM32 Octo Memory Manager is a low-level interface that enables an > + efficient OCTOSPI pin assignment with a full I/O matrix (before alternate > + function map) and multiplex of single/dual/quad/octal SPI interfaces over > + the same bus. It Supports up to: > + - Two single/dual/quad/octal SPI interfaces > + - Two ports for pin assignment > + > +properties: > + compatible: > + const: st,stm32mp25-omm > + > + "#address-cells": > + const: 2 > + > + "#size-cells": > + const: 1 > + > + ranges: > + description: | > + Reflects the memory layout with four integer values per OSPI instance. > + Format: > + <chip-select> 0 <registers base address> <size> > + minItems: 2 > + maxItems: 2 > + > + reg: > + items: > + - description: OMM registers > + - description: OMM memory map area > + > + reg-names: > + items: > + - const: regs > + - const: memory_map > + > + memory-region: > + description: | > + Memory region shared between the 2 OCTOSPI instance. > + One or two phandle to a node describing a memory mapped region > + depending of child number. > + minItems: 1 > + maxItems: 2 > + > + memory-region-names: > + description: | > + OCTOSPI instance's name to which memory region is associated > + items: > + enum: [ospi1, ospi2] > + minItems: 1 > + maxItems: 2 > + > + clocks: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + access-controllers: > + maxItems: 1 > + > + st,syscfg-amcr: > + $ref: /schemas/types.yaml#/definitions/phandle-array > + description: | > + The Address Mapping Control Register (AMCR) is used to split the 256MB > + memory map area shared between the 2 OSPI instance. The Octo Memory > + Manager sets the AMCR depending of the memory-region configuration. > + The memory split bitmask description is: > + - 000: OCTOSPI1 (256 Mbytes), OCTOSPI2 unmapped > + - 001: OCTOSPI1 (192 Mbytes), OCTOSPI2 (64 Mbytes) > + - 010: OCTOSPI1 (128 Mbytes), OCTOSPI2 (128 Mbytes) > + - 011: OCTOSPI1 (64 Mbytes), OCTOSPI2 (192 Mbytes) > + - 1xx: OCTOSPI1 unmapped, OCTOSPI2 (256 Mbytes) > + items: > + - description: phandle to syscfg > + - description: register offset within syscfg > + - description: register bitmask for memory split > + > + st,omm-req2ack-ns: > + description: | > + In multiplexed mode (MUXEN = 1), this field defines the time in > + nanoseconds between two transactions. default: ? > + > + st,omm-cssel-ovr: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + Configure the chip select selector override for the 2 OCTOSPIs. > + - 0: OCTOSPI1 chip select send to NCS1 OCTOSPI2 chip select send to NCS1 > + - 1: OCTOSPI1 chip select send to NCS2 OCTOSPI2 chip select send to NCS1 > + - 2: OCTOSPI1 chip select send to NCS1 OCTOSPI2 chip select send to NCS2 > + - 3: OCTOSPI1 chip select send to NCS2 OCTOSPI2 chip select send to NCS2 > + minimum: 0 > + maximum: 3 default: ? > + > + st,omm-mux: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + Configure the muxing between the 2 OCTOSPIs busses and the 2 output ports. > + - 0: direct mode, default Don't repeat constraints in free form text. > + - 1: mux OCTOSPI1 and OCTOSPI2 to port 1 > + - 2: swapped mode > + - 3: mux OCTOSPI1 and OCTOSPI2 to port 2 > + minimum: 0 > + maximum: 3 default: ? None of them are required, so usually we expect defaults. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@xxxxxxxxxx> Best regards, Krzysztof
