Add sysreg nodes for the PERIC0 and PERIC1 domains.
These system registers are used for peripheral configuration
and control in Exynos990.
Each sysreg node includes its base address, register size, and clock
dependencies.
Signed-off-by: Denzeel Oliva <wachiturroxd150@xxxxxxxxx>
---
arch/arm64/boot/dts/exynos/exynos990.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
diff --git a/arch/arm64/boot/dts/exynos/exynos990.dtsi b/arch/arm64/boot/dts/exynos/exynos990.dtsi
index 843587b17..aa056fdae 100644
--- a/arch/arm64/boot/dts/exynos/exynos990.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos990.dtsi
@@ -242,6 +242,12 @@ cmu_peric0: clock-controller@10400000 {
clock-names = "oscclk", "bus", "ip";
};
+ sysreg_peric0: syscon@10420000 {
+ compatible = "samsung,exynos990-peric0-sysreg", "syscon";
+ reg = <0x10420000 0x10000>;
+ clocks = <&cmu_peric0 CLK_GOUT_PERIC0_SYSREG_PCLK>;
+ };
+
pinctrl_peric1: pinctrl@10730000 {
compatible = "samsung,exynos990-pinctrl";
reg = <0x10730000 0x1000>;
@@ -259,6 +265,12 @@ cmu_peric1: clock-controller@10700000 {
clock-names = "oscclk", "bus", "ip";
};
+ sysreg_peric1: syscon@10720000 {
+ compatible = "samsung,exynos990-peric1-sysreg", "syscon";
+ reg = <0x10720000 0x10000>;
+ clocks = <&cmu_peric1 CLK_GOUT_PERIC1_SYSREG_PCLK>;
+ };
+
cmu_hsi0: clock-controller@10a00000 {
compatible = "samsung,exynos990-cmu-hsi0";
reg = <0x10a00000 0x8000>;
--
2.48.1
