On 5.02.2025 7:27 PM, Raviteja Laggyshetty wrote:
> From: Jagadeesh Kona <quic_jkona@xxxxxxxxxxx>
>
> Add OPP tables required to scale DDR and L3 per freq-domain
> on SA8775P platform.
>
> If a single OPP table is used for both CPU domains, then
> _allocate_opp_table() won't be invoked for CPU4 but instead
> CPU4 will be added as device under the CPU0 OPP table. Due
> to this, dev_pm_opp_of_find_icc_paths() won't be invoked for
> CPU4 device and hence CPU4 won't be able to independently scale
> it's interconnects. Both CPU0 and CPU4 devices will scale the
> same ICC path which can lead to one device overwriting the BW
> vote placed by other device. Hence CPU0 and CPU4 require separate
> OPP tables to allow independent scaling of DDR and L3 frequencies
> for each CPU domain, with the final DDR and L3 frequencies being
> an aggregate of both.
>
> Co-developed-by: Shivnandan Kumar <quic_kshivnan@xxxxxxxxxxx>
> Signed-off-by: Shivnandan Kumar <quic_kshivnan@xxxxxxxxxxx>
> Signed-off-by: Jagadeesh Kona <quic_jkona@xxxxxxxxxxx>
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@xxxxxxxxxxx>
> ---
[...]
> + cpu0_opp_table: opp-table-cpu0 {
> + compatible = "operating-points-v2";
> + opp-shared;
> +
> + cpu0_opp_1267mhz: opp-1267200000 {
Drop the labels, they're not needed anywhere
> + opp-hz = /bits/ 64 <1267200000>;
> + opp-peak-kBps = <6220800 29491200>;
(921600 * 32) etc. to reflect the clock rate, please
Konrad
