On 10.02.2025 10:27 AM, Neil Armstrong wrote: > On 09/02/2025 15:45, Neil Armstrong wrote: >> On 07/02/2025 21:23, Konrad Dybcio wrote: >>> On 7.02.2025 11:31 AM, Neil Armstrong wrote: >>>> The ARM PMUs shares the same per-cpu (PPI) interrupt, so we need to switch >>>> to interrupt-cells = <4> in the GIC node to allow adding an interrupt >>>> partition map phandle as the 4th cell value for GIC_PPI interrupts. >>>> >>>> Signed-off-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx> >>>> --- >>> >>> If I'm reading the core right, we can leave the fourth cell >>> uninitialized where it makes no sense >> >> It's not what dtbs_check thinks ! > > And if you don't specify the 4th cell, dtc is not happy at all: > > arch/arm64/boot/dts/qcom/sm8650.dtsi:5302.4-27: Warning (interrupts_property): /soc@0/timer@17420000/frame@1742d000:#interrupt-cells: size is (12), expected multiple of 16 > arch/arm64/boot/dts/qcom/sm8650.dtsi:5302.4-27: Warning (interrupts_property): /soc@0/rsc@17a00000:#interrupt-cells: size is (36), expected multiple of 16 > arch/arm64/boot/dts/qcom/sm8650.dtsi:5302.4-27: Warning (interrupts_property): /soc@0/mmc@8804000:#interrupt-cells: size is (24), expected multiple of 16 > ... > for a good reason, if you specify 4 cells and you specify multiple interrupts the > DT code will split the interrupts entry by interrupts-cells + 1. Right, that's a dumb "feature".. but everyone is kicking down the dtc improvements can down the road indefinitely > > Remember we pass the DT in the DTB format without all the verbosity of DTS, > the properly is only a bunch of u32 blobs we can extract with the help > of the -cells properties of the providers. Which we could/should make dtc autogenerate, eventually Konrad
