On 2/10/2025 1:21 PM, Manivannan Sadhasivam wrote:
On Wed, Dec 04, 2024 at 02:19:56PM +0530, Krishna Chaitanya Chundru wrote:
[...]
+ pcie@3,0 {
+ reg = <0x21800 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+ bus-range = <0x05 0xff>;
+
+ qcom,tx-amplitude-millivolt = <10>;
+ pcie@0,0 {
+ reg = <0x50000 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
There's a 2nd PCI-PCI bridge?
This the embedded ethernet port which is as part of DSP3.
Hi Rob,
Can you please check my response on your queries, if you need
any extra information, we can provide to sort this out.
I believe Rob was pointing the 'device_type' property which is not needed for
PCI device nodes but only for nodes implementing PCI bus (like host bridge, PCI
bridge).
Got it, I will remove device_type in the next patch series.
- Krishna Chaitanya.
- Mani
