Reserve a portion of memory for inter-processor communication between
all remote processors running RTOS or baremetal firmware.
Signed-off-by: Wadim Egorov <w.egorov@xxxxxxxxx>
---
arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
index 99a6fdfaa7fb..e8d1b88651e7 100644
--- a/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
@@ -99,6 +99,12 @@ mcu_m4fss_memory_region: m4f-memory@a4100000 {
reg = <0x00 0xa4100000 0x00 0xf00000>;
no-map;
};
+
+ rtos_ipc_memory_region: ipc-memories@a5000000 {
+ reg = <0x00 0xa5000000 0x00 0x00800000>;
+ alignment = <0x1000>;
+ no-map;
+ };
};
leds {
--
2.34.1
