On Wed, Jan 29, 2025 at 04:29:02PM +0200, Alisa-Dariana Roman wrote: > AD7191 is a pin-programmable, ultra-low noise 24-bit sigma-delta ADC > designed for precision bridge sensor measurements. It features two > differential analog input channels, selectable output rates, > programmable gain, internal temperature sensor and simultaneous > 50Hz/60Hz rejection. > > Signed-off-by: Alisa-Dariana Roman <alisa.roman@xxxxxxxxxx> > --- > .../bindings/iio/adc/adi,ad7191.yaml | 149 ++++++++++++++++++ > MAINTAINERS | 7 + > 2 files changed, 156 insertions(+) > create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml > > diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml > new file mode 100644 > index 000000000000..ac14096ba76c > --- /dev/null > +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7191.yaml > @@ -0,0 +1,149 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2025 Analog Devices Inc. > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/iio/adc/adi,ad7191.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Analog Devices AD7191 ADC > + > +maintainers: > + - Alisa-Dariana Roman <alisa.roman@xxxxxxxxxx> > + > +description: | > + Bindings for the Analog Devices AD7191 ADC device. Datasheet can be > + found here: > + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7191.pdf > + The device's PDOWN pin must be connected to the SPI controller's chip select > + pin. > + > +properties: > + compatible: > + enum: > + - adi,ad7191 > + > + reg: > + maxItems: 1 > + > + spi-cpol: true > + > + spi-cpha: true > + > + clocks: > + maxItems: 1 > + description: | Don't need '|' if no formatting. > + Must be present when CLKSEL pin is tied HIGH to select external clock > + source (either a crystal between MCLK1 and MCLK2 pins, or a > + CMOS-compatible clock driving MCLK2 pin). Must be absent when CLKSEL pin > + is tied LOW to use the internal 4.92MHz clock. > + > + interrupts: > + maxItems: 1 > + > + avdd-supply: > + description: AVdd voltage supply > + > + dvdd-supply: > + description: DVdd voltage supply > + > + vref-supply: > + description: Vref voltage supply > + > + odr-gpios: > + description: | Don't need '|' if no formatting. > + ODR1 and ODR2 pins for output data rate selection. Should be defined if > + adi,odr-value is absent. > + minItems: 2 > + maxItems: 2 > + > + adi,odr-value: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: | > + Should be present if ODR pins are pin-strapped. Possible values: > + 120 Hz (ODR1=0, ODR2=0) > + 60 Hz (ODR1=0, ODR2=1) > + 50 Hz (ODR1=1, ODR2=0) > + 10 Hz (ODR1=1, ODR2=1) > + If defined, odr-gpios must be absent. > + enum: [120, 60, 50, 10] > + > + pga-gpios: > + description: | Don't need '|' if no formatting. With those fixed, Reviewed-by: Rob Herring (Arm) <robh@xxxxxxxxxx> > + PGA1 and PGA2 pins for gain selection. Should be defined if adi,pga-value > + is absent. > + minItems: 2 > + maxItems: 2
