On Tue, Jan 28, 2025 at 12:16:32PM +0530, Kartik Rajput wrote: > The Tegra UTC (UART Trace Controller) is a HW based serial port that > allows multiplexing multiple data streams of up to 16 UTC clients into > a single hardware serial port. > > Add bindings for the Tegra UTC client device. > > Signed-off-by: Kartik Rajput <kkartik@xxxxxxxxxx> > --- > .../bindings/serial/nvidia,tegra264-utc.yaml | 83 +++++++++++++++++++ > 1 file changed, 83 insertions(+) > create mode 100644 Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml > > diff --git a/Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml b/Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml > new file mode 100644 > index 000000000000..63ba3655451f > --- /dev/null > +++ b/Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml > @@ -0,0 +1,83 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/serial/nvidia,tegra264-utc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: NVIDIA Tegra UART Trace Controller (UTC) client Controller and client (Client?) sound conflicting. What is this client of? > + > +maintainers: > + - Kartik Rajput <kkartik@xxxxxxxxxx> > + - Thierry Reding <thierry.reding@xxxxxxxxx> > + - Jonathan Hunter <jonathanh@xxxxxxxxxx> > + > +description: > + The Tegra UTC (UART Trace Controller) is a hardware controller that > + allows multiple systems within the Tegra SoC to share a hardware UART > + interface. It supports up to 16 clients, with each client having its own > + interrupt and a FIFO buffer for both RX (receive) and TX (transmit), each > + capable of holding 128 characters. So is this client or the controller? > + > + The Tegra UTC uses 8-N-1 configuration and operates on a pre-configured > + baudrate, which is configured by the bootloader. > + > +properties: > + $nodename: > + pattern: "^serial(@.*)?$" Drop, not needed. But you miss proper $ref, see other bindings. > + > + compatible: > + const: nvidia,tegra264-utc > + > + reg: > + items: > + - description: Register region for TX client. Drop redundant parts, so just "TX region". > + - description: Register region for RX client. > + minItems: 2 Drop > + > + reg-names: > + items: > + - const: tx > + - const: rx > + minItems: 2 Drop. Please take a look at other bindings how they do things. There is no such code anywhere in the kernel. > + > + interrupts: > + maxItems: 1 > + > + current-speed: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: > + This property specifies the baudrate at which the Tegra UTC is Drop "This property specifies the". Do not say what Devicetree syntax is. We all know. This is a description of hardware, not the DTS langauge. > + operating. > + > + nvidia,utc-fifo-threshold: > + $ref: /schemas/types.yaml#/definitions/uint32 > + description: > + This property specifies the UTC TX and RX client FIFO threshold in > + terms of occupancy. > + > + This property should have the same value as the burst size (number > + of characters read by the Tegra UTC hardware at a time from each > + client) which is configured by the bootloader. Title says this is a client, so quite confusing. Anyway, why is this board specific? Also, missing constraints, missing units. Why common serial properties are not applicable? Best regards, Krzysztof
