Datasheet recommends Setting the MOSI idle state to high in order to prevent accidental reset of the device when SCLK is free running. This happens when the controller clocks out a 1 followed by 63 zeros while the CS is held low. Check if SPI controller supports SPI_MOSI_IDLE_HIGH flag and set it. Fixes: a5f8c7da3dbe ("iio: adc: Add AD7768-1 ADC basic support") Signed-off-by: Jonathan Santos <Jonathan.Santos@xxxxxxxxxx> --- v2 Changes: * Only setup SPI_MOSI_IDLE_HIGH flag if the controller supports it, otherwise the driver continues the same. I realized that using bits_per_word does not avoid the problem that MOSI idle state is trying to solve. If the controller drives the MOSI low between bytes during a transfer, nothing happens. --- drivers/iio/adc/ad7768-1.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/iio/adc/ad7768-1.c b/drivers/iio/adc/ad7768-1.c index c3cf04311c40..95ba89435652 100644 --- a/drivers/iio/adc/ad7768-1.c +++ b/drivers/iio/adc/ad7768-1.c @@ -574,6 +574,22 @@ static int ad7768_probe(struct spi_device *spi) return -ENOMEM; st = iio_priv(indio_dev); + /* + * Datasheet recommends SDI line to be kept high when + * data is not being clocked out of the controller + * and the spi clock is free running, to prevent + * accidental reset. + * Since many controllers do not support the + * SPI_MOSI_IDLE_HIGH flag yet, only request the MOSI + * idle state to enable if the controller supports it. + */ + if (spi->controller->mode_bits & SPI_MOSI_IDLE_HIGH) { + spi->mode |= SPI_MOSI_IDLE_HIGH; + ret = spi_setup(spi); + if (ret < 0) + return ret; + } + st->spi = spi; st->vref = devm_regulator_get(&spi->dev, "vref"); -- 2.34.1