On Sun, Jan 26, 2025 at 01:46:07PM +0000, Biju Das wrote:
> Add SDHI0-SDHI2 nodes to RZ/G3E ("R9A09G047") SoC DTSI.
>
> Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx>
> ---
> This patch depend upon [1]
> [1] https://lore.kernel.org/all/20250120094715.25802-12-biju.das.jz@xxxxxxxxxxxxxx/
> ---
> arch/arm64/boot/dts/renesas/r9a09g047.dtsi | 57 ++++++++++++++++++++++
> 1 file changed, 57 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
> index 2023f70d3329..099d13b83f18 100644
> --- a/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r9a09g047.dtsi
> @@ -518,6 +518,63 @@ gic: interrupt-controller@14900000 {
> interrupt-controller;
> interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
> };
> +
> + sdhi0: mmc@15c00000 {
> + compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x15c00000 0 0x10000>;
> + interrupts = <GIC_SPI 735 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 736 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0xa3>, <&cpg CPG_MOD 0xa5>,
> + <&cpg CPG_MOD 0xa4>, <&cpg CPG_MOD 0xa6>;
> + clock-names = "core", "clkh", "cd", "aclk";
> + resets = <&cpg 0xa7>;
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + vqmmc_sdhi0: vqmmc-regulator {
> + regulator-name = "SDHI0-VQMMC";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + };
> +
> + sdhi1: mmc@15c10000 {
> + compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x15c10000 0 0x10000>;
> + interrupts = <GIC_SPI 737 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 738 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0xa7>, <&cpg CPG_MOD 0xa9>,
> + <&cpg CPG_MOD 0xa8>, <&cpg CPG_MOD 0xaa>;
> + clock-names = "core", "clkh", "cd", "aclk";
> + resets = <&cpg 0xa8>;
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + vqmmc_sdhi1: vqmmc-regulator {
> + regulator-name = "SDHI1-VQMMC";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + };
> +
> + sdhi2: mmc@15c20000 {
> + compatible = "renesas,sdhi-r9a09g047", "renesas,sdhi-r9a09g057";
> + reg = <0x0 0x15c20000 0 0x10000>;
> + interrupts = <GIC_SPI 739 IRQ_TYPE_LEVEL_HIGH>,
> + <GIC_SPI 740 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 0xab>, <&cpg CPG_MOD 0xad>,
> + <&cpg CPG_MOD 0xac>, <&cpg CPG_MOD 0xae>;
> + clock-names = "core", "clkh", "cd", "aclk";
> + resets = <&cpg 0xa9>;
> + power-domains = <&cpg>;
> + status = "disabled";
> +
> + vqmmc_sdhi2: vqmmc-regulator {
> + regulator-name = "SDHI2-VQMMC";
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> + };
> };
>
> timer {
> --
> 2.43.0
>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@xxxxxxxxxxxxxx>
