Hello Jiaxun,
> 在2025年1月16日一月 上午10:59，Gregory CLEMENT写道：
>> The CM3.5 device used in EyeQ6H SoCs incorrectly reports the status
>> for Hardware Cache Initialization (HCI). This commit adds the
>> compatible string for the CM to acknowledge this issue, which enables
>> the use of the second CPU cluster.
>>
>> Signed-off-by: Gregory CLEMENT <gregory.clement@xxxxxxxxxxx>
>> ---
>> arch/mips/boot/dts/mobileye/eyeq6h.dtsi | 4 ++++
>> 1 file changed, 4 insertions(+)
>>
>> diff --git a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi
>> b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi
>> index
>> 1db3c3cda2e395025075387bcb66ea0737fd37f6..c6087bd8ca1d47855b8d93aa7e75e1fed219587b
>> 100644
>> --- a/arch/mips/boot/dts/mobileye/eyeq6h.dtsi
>> +++ b/arch/mips/boot/dts/mobileye/eyeq6h.dtsi
>> @@ -32,6 +32,10 @@ cpu_intc: interrupt-controller {
>> #interrupt-cells = <1>;
>> };
>>
>> + coherency-manager {
>> + compatible = "mti,eyeq6-cm";
>
> ^
> Maybe compatible = "mti,eyeq6-cm", "mti,mips-cm";
I explicitly makes the compatible "mti,eyeq6-cm" and "mti,mips-cm"
mutually exclusive. This allows us to require the reg property only for
"mti,mips-cm" and not have to provide it for "mti,eyeq6-cm".
Thanks for your prompt feedback,
Gregory
--
Grégory CLEMENT, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
