On Wed, 08 Jan 2025 19:28:34 +0800, niravkumar.l.rabara@xxxxxxxxx wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
>
> Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
> ---
> .../boot/dts/intel/socfpga_agilex5_socdk.dts | 33 +++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
My bot found new DTB warnings on the .dts files added or changed in this
series.
Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.
If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:
pip3 install dtschema --upgrade
New warnings running 'make CHECK_DTBS=y intel/socfpga_agilex5_socdk.dtb' for 20250108112834.2880709-1-niravkumar.l.rabara@xxxxxxxxx:
arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dtb: flash@0: Unevaluated properties are not allowed ('cdns,block-size', 'cdns,page-size' were unexpected)
from schema $id: http://devicetree.org/schemas/mtd/jedec,spi-nor.yaml#
