On 08/01/2025 12:28, niravkumar.l.rabara@xxxxxxxxx wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
>
> Add Micron qspi nor flash node for Intel SoCFPGA Agilex5.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx>
> ---
> .../boot/dts/intel/socfpga_agilex5_socdk.dts | 33 +++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
> index c533e5a3a610..6760c088f174 100644
> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
> @@ -37,3 +37,36 @@ &usb0 {
> &watchdog0 {
> status = "okay";
> };
> +
> +&qspi {
Why breaking the order?
Please *again* read DTS coding style.
> + status = "okay";
> + flash@0 {
> + compatible = "micron,mt25qu02g", "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <100000000>;
> + m25p,fast-read;
> + cdns,page-size = <256>;
> + cdns,block-size = <16>;
> + cdns,read-delay = <2>;
> + cdns,tshsl-ns = <50>;
> + cdns,tsd2d-ns = <50>;
> + cdns,tchsh-ns = <4>;
> + cdns,tslch-ns = <4>;
It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).
Maybe you need to update your dtschema and yamllint. Don't rely on
distro packages for dtschema and be sure you are using the latest
released dtschema.
Several patches you sent recently lack above: following DTS coding style
and not tested. Repeating the same comment over and over is very
discouraging.
Best regards,
Krzysztof
