Quoting Rohit Visavalia (2025-01-06 20:40:38) > It is marked as optional as some of the ZynqMP designs are having vcu_reset > (reset pin of VCU IP) driven by proc_sys_reset, proc_sys_reset is another > PL IP driven by the PS pl_reset. So, here the VCU reset is not driven by > axi_gpio or PS GPIO so there will be no GPIO entry. > > Signed-off-by: Rohit Visavalia <rohit.visavalia@xxxxxxx> > --- Applied to clk-next
