Hi Geert, > -----Original Message----- > From: Geert Uytterhoeven <geert@xxxxxxxxxxxxxx> > Sent: 03 January 2025 18:46 > Subject: Re: [PATCH v4 2/7] dt-bindings: pinctrl: renesas: Document RZ/G3E SoC > > Hi Biju, > > Thanks for the update! > > On Mon, Dec 16, 2024 at 8:53 PM Biju Das <biju.das.jz@xxxxxxxxxxxxxx> wrote: > > Add documentation for the pin controller found on the Renesas RZ/G3E > > (R9A09G047) SoC. The RZ/G3E PFC is similar to the RZ/V2H SoC but has > > more pins(P00-PS3). > > > > Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx> > > Signed-off-by: Biju Das <biju.das.jz@xxxxxxxxxxxxxx> > > --- > > v3->v4: > > * Dropped ack tag from Conor as there is separate file for RZG3E_P* > > definitions > > You forgot to actually drop it? Oops. I missed it. > I guess it doesn't matter much... OK. > > > --- /dev/null > > +++ b/include/dt-bindings/pinctrl/renesas,r9a09g047-pinctrl.h > > @@ -0,0 +1,41 @@ > > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */ > > +/* > > + * This header provides constants for Renesas RZ/G3E family pinctrl bindings. > > + * > > + * Copyright (C) 2024 Renesas Electronics Corp. > > + * > > + */ > > + > > +#ifndef __DT_BINDINGS_RZG3E_PINCTRL_H #define > > +__DT_BINDINGS_RZG3E_PINCTRL_H > > > +#endif /* __DT_BINDINGS_RZG3E_PINCTRL_H */ > > __DT_BINDINGS_PINCTRL_RENESAS_R9A09G047_PINCTRL_H__ > Thanks for fixing it. Cheers, Biju
