Hi Linus,
Thanks for your reply.
On 2024/12/28 01:19, Linus Walleij wrote:
[ EXTERNAL EMAIL ]
Newcomers, latest patch set:
https://lore.kernel.org/linux-gpio/20241226-amlogic-pinctrl-v2-0-cdae42a67b76@xxxxxxxxxxx/
I included some of the prior meson authors on the to line to see if
their mail addresses still work and if they have some feedback on this.
On Sun, Dec 22, 2024 at 10:08 AM Linus Walleij <linus.walleij@xxxxxxxxxx> wrote:
- Renaming drivers/pinctrl/sunxi to drivers/pinctrl/amlogic
so we keep this sorted by actual vendor, sunxi is apparently
yours (AMlogic:s) isn't it?
It isn't. Sunxi is Allwinner SoCs.
My apologies. I mixed it up completely. :(
But wait a minute. I see there is meson. And in the "meson" subdirectory
there is stuff named "amlogic" ...
$ ls -1 drivers/pinctrl/meson/
Kconfig
Makefile
pinctrl-amlogic-c3.c
pinctrl-amlogic-t7.c
pinctrl-meson8b.c
pinctrl-meson8.c
pinctrl-meson8-pmx.c
pinctrl-meson8-pmx.h
pinctrl-meson-a1.c
pinctrl-meson-axg.c
pinctrl-meson-axg-pmx.c
pinctrl-meson-axg-pmx.h
pinctrl-meson.c
pinctrl-meson-g12a.c
pinctrl-meson-gxbb.c
pinctrl-meson-gxl.c
pinctrl-meson.h
pinctrl-meson-s4.c
What do you think of the idea of a separate drivers/pinctrl/amlogic directory
though? I think there are already quite a few amlogic SoCs that need
to be supported and more will come.
So what about renaming the existing subdir "meson" to "amlogic"
and put the driver there.
Also I want to know if this driver and hardware shares anything with
the existing drivers in that directory. It sometimes happen that
developers start something from scratch despite the existence of
prior art simply because of organizational issues, and we don't want
that kind of situation to leak over to the kernel.
Initially, I developed the driver for the A4 chip based on the existing
framework (driver/pinctrl/meson/). Following the pattern of previous
chips, I added the pin definitions directly to the bindings, but this
approach was rejected by the maintainers ([0]).
I then attempted an alternative approach: adding the bank to the
bindings and converting pin definitions based on the bank and offset
within the source code. I moved the pin definitions into the source code
itself, but this was also not accepted ([1]).
Realizing that the issue could not be resolved within the limitations of
the old framework, I decided to introduce a new framework driver to
address these problems.
In the new framework, I made significant changes to simplify support for
subsequent chips. Now, after adding the source files and binding
documents, the only required operation for supporting future Amlogic
SoCs (such as A4, A5, as well as existing chips like S4, C3, and T7) is
to add the corresponding DTS node.
[0]
https://lore.kernel.org/all/20240611-a4_pinctrl-v1-2-dc487b1977b3@xxxxxxxxxxx/
[1]
https://lore.kernel.org/all/20241113-a4_pinctrl-v6-0-35ba2401ee35@xxxxxxxxxxx/
Yours,
Linus Walleij
