Hi,
On Tue, Dec 10, 2024 at 12:10:19AM +0100, Heiko Stuebner wrote:
> From: Heiko Stuebner <heiko.stuebner@xxxxxxxxx>
>
> Add a Synopsys Designware MIPI DSI host DRM bridge driver for their
> DSI2 host controller, based on the Rockchip version from the driver
> rockchip/dw-mipi-dsi2.c in their vendor-kernel with phy & bridge APIs.
>
> While the driver is heavily modelled after the previous IP, the register
> set of this DSI2 controller is completely different and there are also
> additional properties like the variable-width phy interface.
>
> Tested-by: Daniel Semkowicz <dse@xxxxxxxxxxxxx>
> Tested-by: Dmitry Yashin <dmt.yashin@xxxxxxxxx>
> Reviewed-by: Neil Armstrong <neil.armstrong@xxxxxxxxxx>
> Signed-off-by: Heiko Stuebner <heiko.stuebner@xxxxxxxxx>
[..]
> +static void dw_mipi_dsi2_set_vid_mode(struct dw_mipi_dsi2 *dsi2)
> +{
> + u32 val = 0, mode;
> + int ret;
> +
> + if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP)
> + val |= BLK_HFP_HS_EN;
> +
> + if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP)
> + val |= BLK_HBP_HS_EN;
> +
> + if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA)
> + val |= BLK_HSA_HS_EN;
For all three of these: is setting an ENable bit the right thing to
turn features *off*?
> + if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_BURST)
> + val |= VID_MODE_TYPE_BURST;
> + else if (dsi2->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE)
> + val |= VID_MODE_TYPE_NON_BURST_SYNC_PULSES;
> + else
> + val |= VID_MODE_TYPE_NON_BURST_SYNC_EVENTS;
> +
> + regmap_write(dsi2->regmap, DSI2_DSI_VID_TX_CFG, val);
> +
> + regmap_write(dsi2->regmap, DSI2_MODE_CTRL, VIDEO_MODE);
> + ret = regmap_read_poll_timeout(dsi2->regmap, DSI2_MODE_STATUS,
> + mode, mode & VIDEO_MODE,
> + 1000, MODE_STATUS_TIMEOUT_US);
> + if (ret < 0)
> + dev_err(dsi2->dev, "failed to enter video mode\n");
> +}
...
Chris
