[PATCH v3 0/3] Add support for USB controllers on QCS615

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This series aims at enabling USB on QCS615 which has 2 USB controllers.
The primary controller is SuperSpeed capable and secondary one is
High Speed only capable. The High Speed Phy is a QUSB2 phy and the
SuperSpeed Phy is a QMP Uni Phy which supports non-concurrent DP.

Link to v1:
https://lore.kernel.org/all/20241014084432.3310114-1-quic_kriskura@xxxxxxxxxxx/

Link to v2:
https://lore.kernel.org/all/20241017130701.3301785-1-quic_kriskura@xxxxxxxxxxx/

All the patches are acked. But some are merged and some don't apply clean.

Phy bindings have been acked on v1 and have been merged from v1.

The v2 DWC3 binding patch has been acked but conflicts with sar2130 code
and hence v2-patch-1 doesn't apply cleanly.

The QUSB2 phy driver changes in v2 conflict with IPQ changes that went in
recently and hence v2-patch-4 doesn't apply cleanly.

Changes in v3:
Rebase on top of latest linux next to avoid conflicts.
Updated mail ID from quicinc to OSS. So changed the SOBs and retained the
ACKs since the author is still the same.
Updated cover letter heading since the changes are for both ports and DT
for first port is merged and second port is ACKed.

Changes in v2:
Addressed comments in v1 by using lowercase for reg values.
Removed explicitly setting of struct params to false (as they are
already false).

Krishna Kurapati (3):
  dt-bindings: usb: qcom,dwc3: Add QCS615 to USB DWC3 bindings
  phy: qcom-qusb2: Add support for QCS615
  phy: qcom: qmp-usbc: Add qmp configuration for QCS615

 .../devicetree/bindings/usb/qcom,dwc3.yaml    |  3 +++
 drivers/phy/qualcomm/phy-qcom-qmp-usbc.c      |  3 +++
 drivers/phy/qualcomm/phy-qcom-qusb2.c         | 27 +++++++++++++++++++
 3 files changed, 33 insertions(+)

-- 
2.34.1





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