This adds all the pin mappings on the WiFi/BT header on the SoPine baseboard/A64-LTS. They're disabled by default as the modules don't ship by default. This includes, where they haven't been already, UART1 for BT and mmc1 for WiFi. Signed-off-by: Peter Robinson <pbrobinson@xxxxxxxxx> --- .../allwinner/sun50i-a64-sopine-baseboard.dts | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts index be2347c8f267..752d2aae8465 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts +++ b/arch/arm64/boot/dts/allwinner/sun50i-a64-sopine-baseboard.dts @@ -42,6 +42,11 @@ reg_vcc1v8: vcc1v8 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1800000>; }; + + wifi_pwrseq: pwrseq { + compatible = "mmc-pwrseq-simple"; + reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */ + }; }; &ac_power_supply { @@ -103,6 +108,17 @@ ext_rgmii_phy: ethernet-phy@1 { }; }; +/* On Wifi/BT connector */ +&mmc1 { + pinctrl-names = "default"; + pinctrl-0 = <&mmc1_pins>; + vmmc-supply = <®_dldo4>; + vqmmc-supply = <®_eldo1>; + mmc-pwrseq = <&wifi_pwrseq>; + bus-width = <4>; + non-removable; +}; + &mmc2 { pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; @@ -175,6 +191,14 @@ &uart0 { status = "okay"; }; +/* On Wifi/BT connector, with RTS/CTS */ +&uart1 { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; + uart-has-rtscts; + status = "disabled"; +}; + /* On Pi-2 connector */ &uart2 { pinctrl-names = "default"; -- 2.47.1