On 12/4/24 00:32, niravkumar.l.rabara@xxxxxxxxx wrote:
From: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx> Add gpio0 controller node and correct DMA handshake ID for SPI tx and rx channels. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@xxxxxxxxx> --- .../arm64/boot/dts/intel/socfpga_agilex5.dtsi | 24 ++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi index 1162978329c1..51c6e19e40b8 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi @@ -222,6 +222,26 @@ i3c1: i3c@10da1000 { status = "disabled"; };
Applied! Thanks, Dinh