Convert the Xilinx SPDIF 2.0 device tree binding documentation to
json-schema.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@xxxxxxx>
---
.../devicetree/bindings/sound/xlnx,spdif.txt | 28 -----
.../devicetree/bindings/sound/xlnx,spdif.yaml | 100 ++++++++++++++++++
2 files changed, 100 insertions(+), 28 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/xlnx,spdif.txt
create mode 100644 Documentation/devicetree/bindings/sound/xlnx,spdif.yaml
diff --git a/Documentation/devicetree/bindings/sound/xlnx,spdif.txt b/Documentation/devicetree/bindings/sound/xlnx,spdif.txt
deleted file mode 100644
index 15c2d64d247c..000000000000
--- a/Documentation/devicetree/bindings/sound/xlnx,spdif.txt
+++ /dev/null
@@ -1,28 +0,0 @@
-Device-Tree bindings for Xilinx SPDIF IP
-
-The IP supports playback and capture of SPDIF audio
-
-Required properties:
- - compatible: "xlnx,spdif-2.0"
- - clock-names: List of input clocks.
- Required elements: "s_axi_aclk", "aud_clk_i"
- - clocks: Input clock specifier. Refer to common clock bindings.
- - reg: Base address and address length of the IP core instance.
- - interrupts-parent: Phandle for interrupt controller.
- - interrupts: List of Interrupt numbers.
- - xlnx,spdif-mode: 0 :- receiver mode
- 1 :- transmitter mode
- - xlnx,aud_clk_i: input audio clock value.
-
-Example:
- spdif_0: spdif@80010000 {
- clock-names = "aud_clk_i", "s_axi_aclk";
- clocks = <&misc_clk_0>, <&clk 71>;
- compatible = "xlnx,spdif-2.0";
- interrupt-names = "spdif_interrupt";
- interrupt-parent = <&gic>;
- interrupts = <0 91 4>;
- reg = <0x0 0x80010000 0x0 0x10000>;
- xlnx,spdif-mode = <1>;
- xlnx,aud_clk_i = <49152913>;
- };
diff --git a/Documentation/devicetree/bindings/sound/xlnx,spdif.yaml b/Documentation/devicetree/bindings/sound/xlnx,spdif.yaml
new file mode 100644
index 000000000000..5f585157c0d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/xlnx,spdif.yaml
@@ -0,0 +1,100 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/xlnx,spdif.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Device-Tree bindings for Xilinx SPDIF IP
+
+description: |
+ The IP supports playback and capture of SPDIF audio.
+
+maintainers:
+ - Vincenzo Frascino <vincenzo.frascino@xxxxxxx>
+ - Maruthi Srinivas Bayyavarapu <maruthi.srinivas.bayyavarapu@xxxxxxxxxx>
+
+allOf:
+ - $ref: dai-common.yaml#
+
+properties:
+ compatible:
+ const: xlnx,spdif-2.0
+
+ reg:
+ maxItems: 1
+ description: |
+ Base address and size of the IP core instance.
+
+ "#sound-dai-cells":
+ const: 0
+
+ interrupt-names:
+ minItems: 1
+ maxItems: 3
+ description: |
+ Names specified to list of interrupts in same order mentioned under
+ "interrupts".
+
+ interrupts-parent:
+ $ref: /schemas/types.yaml#/definitions/string
+ maxItems: 1
+ description: |
+ Phandle for interrupt controller.
+
+ interrupts:
+ minItems: 1
+ maxItems: 3
+ description: |
+ List of Interrupt numbers.
+
+ clock-names:
+ minItems: 2
+ maxItems: 3
+ description: |
+ List of input clocks.
+
+ clocks:
+ minItems: 2
+ maxItems: 3
+ description: |
+ Input clock specifier. Refer to common clock bindings.
+
+ xlnx,spdif-mode:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ maxItems: 1
+ minimum: 0
+ maximum: 1
+ description: |
+ 0 - receiver
+ 1 - transmitter
+
+ xlnx,aud_clk_i:
+ maxItems: 1
+ description: |
+ Input audio clock value.
+
+required:
+ - compatible
+ - reg
+ - interrupt-names
+ - interrupts
+ - clock-names
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ spdif_0: spdif@80010000 {
+ clock-names = "aud_clk_i", "s_axi_aclk";
+ clocks = <&misc_clk_0>, <&clk 71>;
+ compatible = "xlnx,spdif-2.0";
+ interrupt-names = "spdif_interrupt";
+ interrupt-parent = <&gic>;
+ interrupts = <0 91 4>;
+ reg = <0x0 0x80010000 0x0 0x10000>;
+ xlnx,spdif-mode = <1>;
+ xlnx,aud_clk_i = <49152913>;
+ };
+
+...
--
2.43.0
