On 12.12.2024 5:11 PM, Satya Priya Kakitapalli wrote: > Add PM8775 ADC5 GEN3 Channel info and bindings for the MBG Temp > alarm peripheral found on PM8775 pmic. > > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@xxxxxxxxxxx> > --- > .../bindings/thermal/qcom-spmi-mbg-tm.yaml | 86 ++++++++++++++++++++++ > .../iio/adc/qcom,spmi-adc5-gen3-pm8775.h | 41 +++++++++++ > 2 files changed, 127 insertions(+) > > diff --git a/Documentation/devicetree/bindings/thermal/qcom-spmi-mbg-tm.yaml b/Documentation/devicetree/bindings/thermal/qcom-spmi-mbg-tm.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..909373eb758e4a8b7c2bbd0022c56ab2e823ca13 > --- /dev/null > +++ b/Documentation/devicetree/bindings/thermal/qcom-spmi-mbg-tm.yaml > @@ -0,0 +1,86 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/thermal/qcom-spmi-mbg-tm.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Qualcomm Technologies, Inc. SPMI PMIC MBG Thermal Monitoring > + > +maintainers: > + - Satya Priya Kakitapalli <quic_skakitap@xxxxxxxxxxx> > + > +description: > + Qualcomm's MBG(Master Bandgap) temperature alarm monitors the die > + temperature and generates an interrupt if the PMIC die temperature is > + over a set of programmable temperature thresholds. It allows monitoring > + for both hot and cold, LVL1 and LVL2 thresholds, which makes it different > + from the existing temp alarm peripheral. The interrupt comes over SPMI > + and the MBG's fault status register gives details to understand whether > + it is a hot/cold and LVL1/LVL2 violation. > + > +allOf: > + - $ref: thermal-sensor.yaml# > + > +properties: > + compatible: > + const: qcom,spmi-pm8775-mbg-tm The bus the chip is connected over shouldn't be part of the compatible Konrad