On 02/12/2024 09:45, Steffen Trumtrar wrote:
>>> diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>>> index b1debf0317d0576f7b00200e9593481671183faa..647ccd0b5a66b68fab745d443b975c12d6ce63df 100644
>>> --- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>>> +++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi
>>> @@ -141,6 +141,93 @@ soc: soc@0 {
>>> device_type = "soc";
>>> interrupt-parent = <&intc>;
>>>
>>> + gmac0: ethernet@10810000 {
>>> + compatible = "altr,socfpga-stmmac-a10-s10",
>>
>>
>> That's odd compatible, this is not Arria10 SoC, neither Stratix 10.
>
> Yes, it is. The socfpga-dwmac.txt says "Arria10/Agilex/Stratix10 SoCs" should use "altr,socfpga-stmmac-a10-s10".
>
> So, how to proceed? Adding a "altr,socfpga-stmmac-agilex5" to the binding doc and driver?
> And converting the txt to yaml, because touched it last?
You need dedicated front compatible.
Best regards,
Krzysztof
