Re: [PATCH v4 2/2] arm64: dts: qcom: qcs8300-ride: enable ethernet0

Yijie Yang <quic_yijiyang@xxxxxxxxxxx> · Mon, 25 Nov 2024 11:39:14 +0800

On 2024-11-24 03:41, Andrew Lunn wrote:
On Sat, Nov 23, 2024 at 04:51:54PM +0800, Yijie Yang wrote:
Enable the SerDes PHY on qcs8300-ride. Add the MDC and MDIO pin functions
for ethernet0 on qcs8300-ride. Enable the ethernet port on qcs8300-ride.

Signed-off-by: Yijie Yang <quic_yijiyang@xxxxxxxxxxx>
---
  arch/arm64/boot/dts/qcom/qcs8300-ride.dts | 112 ++++++++++++++++++++++++++++++
  1 file changed, 112 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
index 7eed19a694c39dbe791afb6a991db65acb37e597..af7be26828524cc28299e219c1f0ad459e1c543d 100644
--- a/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs8300-ride.dts
@@ -210,6 +210,95 @@ vreg_l9c: ldo9 {
  	};
  };
  
+&ethernet0 {
+	phy-mode = "2500base-x";
+	phy-handle = <&sgmii_phy0>;

Nit picking, but your PHY clearly is not an SGMII PHY if it is using
2500base-x. I would call it just phy0, so avoiding using SGMII
wrongly, which most vendors do use the name SGMII wrongly.

You're right, that's really confusing here. I'll fix it.


	Andrew

--
Best Regards,
Yijie








