Re: [PATCH v4 1/2] arm64: dts: qcom: qcs8300: add the first 2.5G ethernet

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On 2024-11-24 03:36, Andrew Lunn wrote:
+		ethernet0: ethernet@23040000 {
+			compatible = "qcom,qcs8300-ethqos", "qcom,sa8775p-ethqos";
+			reg = <0x0 0x23040000 0x0 0x10000>,
+			      <0x0 0x23056000 0x0 0x100>;
+			reg-names = "stmmaceth", "rgmii";

Dumb question which should not stop this getting merged.

Since this is now a MAC using a SERDES, do you still need the rmgii
registers? Can the silicon actually do RGMII?

Indeed, the RGMII configuration area is necessary for managing clock settings, even when SERDES is utilized. For instance, the RGMII_CONFIG2_RGMII_CLK_SEL_CFG bit within RGMII_IO_MACRO_CONFIG2 is set in ethqos_configure_sgmii.


	Andrew

--
Best Regards,
Yijie





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